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Posedge and PerfectVIPs Partner to Provide Complete ONFi IP/VIP Solution. Combination of IP and VIP offers Designers the Best Solutions from Both Worlds

The Posedge Family of Flash controllers includes the ONFI3.0 Universal Flash Controller (UFC 3.0), Universal Flash Controller (UFC 2.2), and NAND Flash Controller (NFC) IP solutions for ASIC. They provide a highly configurable soft IP, optimizing gate count and footprint while delivering all the flexibility needed for an interface to NAND, NOR, SRAM and Serial flash device. The cores have Error correction (ECC) option for Hamming Code or BCH Code with up to 64-bit error correction. With support for up to DDR400 at the memory interface and the ability to queue multiple commands at the controller, the Posedge Flash controllers offer high throughput, low host processor overhead and easy integration in any SoC development. Posedge extensive experience with Flash controllers guarantees a rapid product launch.

“This partnership is a win-win deal for us and our customers,” said Chakra Parvathaneni, Vice President, Marketing, at Posedge. “Posedge has always prided itself in providing the most compact, feature rich, reliable Flash Controller IPs. The partnership with PerfectVIPs only validates this claim and gives our customers assurance, confidence and additional tools to minimize the risk in their SoC development. Posedge is committed to expanding its storage offering and giving customers more of what they need moving forward. This partnership is only the beginning of an enduring relationship.”

The PerfectVIPs Genie-ONFi VIP solution provides the most complete verification solutions for ONFi based NAND Flash Devices or Controller designs. The ONFi VIP generates, drives and responds to all ONFi transactions between a host controller and the NAND Flash device. Providing powerful tools such as error injection, erroneous/illegal responses to host requests and clock stop operation, the VIP provides a means to completely validate designs. It also provides protocol checking capability with built in rules for bus level, timing, host and device transactions.

According to Kevin K. Yee, VP, Sales and Marketing, at PerfectVIPs, “The storage market is incredibly active and designers are looking for clear solutions. Designers are looking for the best IP and best VIP available in the market. The strategic partnership between PerfectVIPs and Posedge and the combination of their respective technologies, bring a new level of interoperability required in the next generation of storage development and give designers the solutions they are looking for.”

With support of latest ONFi 3.0 specification and the previous ONFi 2.2 specification, the IP and VIP solutions from Posedge and PerfectVIPs clearly provide a path to higher throughput, higher densities and greater first silicon success in the NAND Flash storage industry. The Posedge IP solutions and the PerfectVIPs VIP solutions are readily available for use.

About Posedge
Posedge Inc. is a world leader in intellectual property (IP) used in communications, networking, memory and I/O semiconductor design. Posedge’s comprehensive and integrated IP solutions – Wireless LAN 802.11a/b/g/n/ac, Wired/Wireless Packet Processors, Multi-Gigabit Routing, 10G MACsec engine, TCP Offload Engine, IPSEC Protocol Processor, Multi-gigabit Layer2+ Switch, SD/SDIO, Flash and bus protocols, enable semiconductor companies to rapidly and cost-effectively develop and differentiate their designs. These technology-leading solutions help give Posedge customers a competitive edge in bringing the best products to market quickly while reducing cost and risk. Posedge is headquartered in Sunnyvale, California.
For more information, visit

About PerfectVIPs
PerfectVIPs is a world-leading provider of Verification IP (VIP) products, delivering the fastest and most effective verification solutions for interface, storage and mobile applications – USB, PCIe, SAS, SATA, AMBA and more. PerfectVIPs accelerates the verification process and delivers higher quality, reliability and productivity while lowering risk, cost and verification delays to complex designs – IP, FPGA, SoC and ASIC development.
For more information, visit

Editorial Contacts:
Chakra Parvathaneni, 408-393-3645, chakra(at)posedge(dot)com             
Rich Timpa, 408-642-6974, rich(at)posedge(dot)com

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