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Synopsys’ DesignWare Universal DDR Memory Controller Delivers up to 30 Percent Lower Latency and Increases System Performance

MOUNTAIN VIEW, Calif. Feb. 9, 2011 DesignWare® Universal DDR Memory Controller

Will Robbins

John Koeter

PHY IP

Availability

March 2011 http://www.synopsys.com/IP/InterfaceIP/DDRn/Pages/default.aspx

About DesignWare IP

interface IP analog IP embedded memories logic libraries audio post-processing configurable processor cores SystemC transaction-level models reuse tools http://www.synopsys.com/designware http://twitter.com/designware_ip

About Synopsys

Mountain View, California North America Europe Japan Asia India http://www.synopsys.com/

Forward Looking Statements

October 31, 2010

Synopsys, DesignWare and Intelli are registered trademarks or trademarks of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

Editorial Contacts:

Sheryl Gulizia

Synopsys, Inc.

650-584-8635

[email protected]

Stephen Brennan

MCA

650-968-8900 x11

[email protected]

SOURCE Synopsys, Inc.

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