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Xilinx Experts to Discuss Through Silicon Vias, Signal Integrity, Design Methodologies and FPGA-based SoC Development at DesignCon 2011

SAN JOSE, Calif. Jan. 31, 2011 Santa Clara, California January 31 through February 3, 2011 Ivo Bolsens

http://photos.prnewswire.com/prnh/20020822/XLNXLOGO

What:

Xilinx at DesignCon 2011

Where:

Santa Clara Convention Center (Santa Clara, Calif.)

When:

Conference – January 31 – February 3, 2011

Exhibits – February 1-2, 2011

Keynote

Wednesday, February 2

12:00 – 12:30 pm

Ivo Bolsens

Global consumer markets continue to drive the need for ubiquitous computing and an insatiable thirst for communications bandwidth, which are fueling the growth of the electronics industry. Yet the cost of building custom SoCs to support many of the emerging applications is becoming increasingly difficult to justify – except for the highest volume devices.  Rising to this challenge, a new class of "crossover SoCs" is emerging that combines many of the strengths of custom SoCs and FPGAs in a single device.  In this session we will discuss the different approaches underway in the industry, including embedded processing subsystems, 3D interconnect technology, SiP and others, and how they will reshape the device landscape over the next decade.

Panel Discussions

Tuesday, February 1

5:00 pm

FPGA Caveman meets FPGA Chiphead FPGA Design Tools and Methodologies: Can they keep pace?

Xilinx Sr. Vice President, Worldwide Marketing,Vin Ratford will join the panel in discussing the performance and capabilities of 28nm FPGA devices and how FPGA vendors are providing ways for end users to integrate IP into FPGA architectures. This panel will examine the key pain points in the FPGA design process, look at unique design needs, and discuss new design tools, methodologies as well as the greater opportunity for a true commercial FPGA EDA tool industry.

5:00 pm

How to Avoid Butchering S Parameters

Mike Jenkins

Wednesday, February 2

2:00 2:50 pm

Back to Edison, Back to Innovation

Ivo Bolsens Jeff Bier James Truchard University of California Edward Lee June 5, 2010 Thomas Edison January 3, 1888

4:30 pm

Meeting chip to chip I/O demands of 100G & beyond line cards

Manoj Roge

5:00 pm

Designing FPGA based PCBs

Andy DeBaets

Paper Session

Wednesday, February 2

10:00 am

Through Silicon Via Design Considering Technology Challenges

Namhoon Kim

Exhibition Demos

February 1-2

MoSys and Xilinx Virtex-6 HXT FPGA demo at Booth #516

http://www.GigaChipAlliance.com

SiSoft and Xilinx Virtex-6 HXT FPGA at Booth #100

Xilinx will be showing the hardware correlation of the Virtex-6 HXT FPGA GTH transceiver IBIS-AMI model.

Agilent and Xilinx Virtex-6 HXT FPGA demo at Booth #201

Xilinx will be demonstrating the Virtex-6 HXT FPGA with the industry’s lowest-jitter 11Gbps+ serial transceiver being analyzed by an Agilent DCA-X Digital Communications Analyzer.

http://www.xilinx.com/products/virtex6/hxt.htm

About DesignCon 2011

http://www.designcon.com

About Xilinx

http://www.xilinx.com/

#1105C

the United States

Xilinx

Bruce Fienberg

408-879-4631

[email protected]

SOURCE Xilinx, Inc.

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